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SPIRS

SECURE PLATFORM FOR ICT SYSTEMS ROOTED AT THE SILICON MANUFACTURING PROCESS (SPIRS)

Home > Dissemination > Publications

Publications

VLSI integration of a RO-based PUF into a 65 nm technology

Autors: Pau Ortega-Castro, Felipe Rojas-Muñoz, Jose M. Mora-Gutiérrez, Piedad Brox, Macarena C. Martínez-Rodríguez

Publication info: IEEE Nordic Circuits and Systems Conference (NorCAS) 2024

Link

Design of a Karatsuba Multiplier to Accelerate Digital Signature Schemes on Embedded Systems

Autors: Pablo Navarro-Torrero, Eros Camacho-Ruiz, Macarena C. Martínez-Rodríguez, Piedad Brox

Publication info: IEEE Nordic Circuits and Systems Conference (NorCAS) 2024

Link

TinyJAMBU Hardware Implementation For Low Power

Autors: C. Fernández-García, J. M. Mora-Gutiérrez, C. J. Jiménez-Fernández

Publication info: IEEE Access, volume 12, pages 108342 - 108349, 2024

Link

Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management

Autors: S. Sánchez-Solano, L.F. Rojas-Muñoz, M.C. Martínez-Rodríguez, P. Brox

Publication info: Sensors, vol. 24, no. 17, article 5674, 2024

Link

Análisis comparativo de las firmas digitales postcuánticas basadas en retículos

Autors: E. Iglesias-Hernández, L. Hernández-Álvarez, L. Hernández-Encinas, J. I. Sanchez-García

Publication info: IX Jornadas Nacionales de Investigación en Ciberseguridad (JNIC 2024)

Link

Study and applications of the new NIST lightweight encryption with authentication standard in hardware implementations

Autors: C. Fernádez-García, C.J. Jiménez-Fernández

Publication info: IX Jornadas Nacionales de Investigación en Ciberseguridad (JNIC 2024)

Link

Ataques por canal lateral contra AES mediante correlación de consumo de potencia

Autors: M. A. González de la Torre, V. Sarasa, L. Hernández-Álvarez, I. Morales, L. Hernández Encinas

Publication info: IX Jornadas Nacionales de Investigación en Ciberseguridad (JNIC 2024)

Link

Review of: Protecting FPGA-Based Cryptohardware Implementations from Fault Attacks Using ADCs

Autors: E. Potestad, A. Casado, E. Tena, A. J. Acosta-Jiménez

Publication info: IX Jornadas Nacionales de Investigación en Ciberseguridad (JNIC 2024)

Link

Cryptographic Security Through a Hardware Root of Trust

Autors: L. F. Rojas-Muñoz, S. Sánchez-Solano, M. C. Martínez-Rodríguez, E. Camacho-Ruiz, P. Navarro-Torrero, A. Karmakar, C. Fernández-García, E. Tena-Sánchez, F. E. Potestad-Ordóñez, A. Casado-Galán, P. Ortega-Castro, A. J. Acosta-Jiménez, C.J. Jiménez-Fernández, P. Brox

Publication info: Lecture Note in Computer Science (LNCS,volume 14553), pp. 106- 119, Proc. Applied Reconfigurable Computing (ARC). Architectures, Tools, and Applications, 2024

Link

Protecting FPGA-Based Cryptohardware Implementations from Fault Attacks Using ADCs

Autors: F. E. Postetad-Ordóñez, A. Casado-Galán, E. Tena-Sánchez

Publication info: Sensors 2024, 24(5), 1598

Link

Experimental cartography generation methodology for Electromagnetic Fault Injection Attacks

Autors: J. C. Rincón-Beneyto, A. Casado-Galán, F. E. Potestad Ordóñez, A. Acosta, E. Tena-Sánchez

Publication info: XXXVIII Conference on Design of Circuits and Integrated Systems (DCIS 2023)

Link

Maximum Operating Frequency Self-Tuning System on FPGAs Using Dynamic Reconfiguration

Autors: C. Fernández, C. J. Jiménez, A. Hakobyan

Publication info: XXXVIII Conference on Design of Circuits and Integrated Systems (DCIS 2023)

Link

A Security Comparison between AES-128 and AES-256 FPGA implementations against DPA attacks

Autors: V. Zúñiga, E. Tena, A. J. Acosta

Publication info: XXXVIII Conference on Design of Circuits and Integrated Systems (DCIS 2023)

Link

A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem

Autors: E. Camacho-Ruiz, S. Sánchez-Solano, M. C. Martínez-Rodríguez, E. Tena-Sánchez, P. Brox

Publication info: XXXVIII Conference on Design of Circuits and Integrated Systems (DCIS 2023)

Link

HW/SW implementation of RSA digital signature on a RISC-V-based System-on-Chip

Autors: A. Karmakar, S. Sánchez-Solano, M. C. Martínez-Rodríguez, P. Brox

Publication info: XXXVIII Conference on Design of Circuits and Integrated Systems (DCIS 2023)

Link

Análisis y evaluación de un RO-PUF como TRNG

Autors: Luis F. Rojas-Muñoz, Santiago Sánchez-Solano, Macarena C. Martínez-Rodríguez, Piedad Brox

Publication info: VIII Jornadas Nacionales de Investigación en Ciberseguridad (JNIC 2023)

Link

A complete SHA-3 hardware library based on a high efficiency Keccak design

Autors: E. Camacho, S. Sánchez-Solano, M. C. Martínez, P. Brox

Publication info: 2023 IEEE Nordic Circuits and Systems Conference (NorCAS 2023)

Link

SoK: A Systematic Review of TEE Usage for Developing Trusted Applications

Autors: Arttu Paju, Muhammad Owais Javed, Juha Nurmi, Juha Savimäki, Brian McGillion, Billy Bob Brumley

Publication info: ARES '23: Proceedings of the 18th International Conference on Availability, Reliability and Security

Link

Timing-Attack-Resistant Acceleration of NTRU Round 3 Encryption on Resource-Constrained Embedded Systems

Autors: E. Camacho-Ruiz, M.C. Martínez-Rodríguez, S. Sánchez-Solano and P. Brox

Publication info: Cryptography, vol. 7, no.2, article 29, 2023

Link

On-Line Evaluation and Monitoring of Security Features of an RO-Based PUF/TRNG for IoT Devices

Autors: L.F. Rojas-Muñoz, S. Sánchez-Solano, M.C. Martínez-Rodríguez and P. Brox

Publication info: Sensors, vol. 23, no. 8, article 4070, 2023

Link

True Random Number Generation Capability of a Ring Oscillator PUF for Reconfigurable Devices

Autors: L. Felipe Rojas-Muñoz, Santiago Sánchez-Solano, Macarena. C. Martínez-Rodríguez, Piedad Brox

Publication info: Electronics 2022, 11(23), 4028

Link

Analysis of the FO Transformation in the Lattice-Based Post-Quantum Algorithms

Autors: M.A. González de la Torre, L. Hernández Encinas, and A. Queiruga-Dios

Publication info: Mathematics 2022, 10(16), 2967

Link

Automated experimental setup for EM cartography to enhance EM attacks

Autors: Erica Tena-Sánchez, Alejandro Casado-Galán, Virginia Zúñiga-González, F. Eugenio Potestad-Ordóñez and Antonio J. Acosta

Publication info: Poster participation - Not published paper in Proc. XXXVII Conference on Design of Circuits and Integrated Systems - DCIS 2022

Link

True Random Number Generator based on RO-PUF

Autors: Luis F. Rojas Muñoz, Santiago Sánchez Solano, Macarena C. Martínez-Rodríguez, Piedad Brox

Publication info: XXXVII Conference on Design of Circuits and Integrated Systems - DCIS 2022

Link

Protegiendo la identidad de las denuncias en un sistema abierto y auditable

Autors: S. Chica, A. Marín, D. Arroyo, J. Díaz

Publication info: Actas de la XVII Reunión Española sobre Criptología y Seguridad de la Información (RECSI 2022), Editorial de la Universidad de Cantabria, pp. 68, 2022

Link

Comparative analysis of lattice-based post-quantum cryptosystems

Autors: M. A. González de la Torre, J. I. Sánchez García, L. Hernández Encinas

Publication info: Actas de la XVII Reunión Española sobre Criptología y Seguridad de la Información (RECSI 2022), Editorial de la Universidad de Cantabria, pp. 121, 2022

Link

Efficient RO-PUF for Generation of Identifiers and Keys in Resource-Constrained Embedded Systems

Autors: Macarena C. Martínez-Rodríguez, Luis F. Rojas-Muñoz, Eros Camacho-Ruiz, Santiago Sánchez-Solano and Piedad Brox

Publication info: Cryptography 6(4), 51, 2022

Link

Implementación hardware de un algoritmo ligero de cifrado

Autors: C. Fernández-García, V. Zúñiga-Ginzález, A. Casado-Galán, E. Tena-Sácnhez, F. E. potestad-Ordóñez, C. J. Jiménez-Fernández

Publication info: IX Jornadas de I+D+i & 1st International Workshop on STEM

Link

Desarrollo de setup experiemntal para la realización de cartografía EM en sistemas criptográficos

Autors: A. Casado-Galán, V. Zúñiga-González, F. E. Potestad-Ordóñez, C. Fernández-García, C. J. Jiménez- Fernández and E. Tena-Sácnhez

Publication info: IX Jornadas de I+D+i & 1st International Workshop on STEM

Link

About the Fujisaki-Okamoto Transformation in the Code-based Algorithms of the NIST Post-Quantum Call

Autors: M. A. González de la Torre and L. Hernández Encinas

Publication info: Proc. 14th International Conference on Computational Intelligence in Security for Information Systems (CISIS'2022), Lecture Notes in Networks and Systems (to appear)

Link

Enhancing the anonymity and auditability of whistleblowers protection

Autors: S. Chica, A. Marín, D. Arroyo, J. Díaz, F. Almenares, and D. Díaz

Publication info: Workshop on Beyond the promises of web3.0: foundations and challenges of trust decentralization (WEB3-TRUST)

Link

Secure Platform for ICT Systems Rooted at the Silicon Manufacturing Process (SPIRS)

Autors: P. Brox, M. C. Martínez-Rodríguez, D. Arroyo

Publication info: Proc. VII Jornadas Nacionales de Investigación en Ciberseguridad (JNIC'2022), 253-256, J. M. de Fuentes, L. González, J. C. Sancho, A. Ayerbe and M. L. Escalante (Eds.), ISBN: 978-84-88734-13-6, Bilbao, June 27-29, 2022

Link

Diseño y evaluación de las prestaciones de funciones físicas no clonables basadas en osciladores en anillo sobre FPGAs

Autors: M. C. Martínez-Rodríguez, E. Camacho-Ruiz, P. Brox, S. Sánchez-Solano

Publication info: Proc. VII Jornadas Nacionales de Investigación en Ciberseguridad (JNIC'2022), 253-256, J. M. de Fuentes, L. González, J. C. Sancho, A. Ayerbe and M. L. Escalante (Eds.), ISBN: 978-84-88734-13-6, Bilbao, June 27-29, 2022

Link

Hardware dedicado para la optimización temporal del algoritmo NTRU

Autors: E. Camacho-Ruiz, M. C. Martínez-Rodríguez, S. Sánchez-Solano, P. Brox

Publication info: Proc. VII Jornadas Nacionales de Investigación en Ciberseguridad (JNIC'2022), 253-256, J. M. de Fuentes, L. González, J. C. Sancho, A. Ayerbe and M. L. Escalante (Eds.), ISBN: 978-84-88734-13-6, Bilbao, June 27-29, 2022

Link

Review of Gate-Level Hardware Countermeasure Comparison Against Power Analysis Attacks

Autors: E. Tena-Sánchez, F. E. Potestad-Ordoñez, V. Zúñiga-González, C. Fernández-García, J. M. Mora Gutiérrez, C. J. Jiménez-Fernández, A. J. Acosta-Jiménez

Publication info: Proc. VII Jornadas Nacionales de Investigación en Ciberseguridad (JNIC'2022), 253-256, J. M. de Fuentes, L. González, J. C. Sancho, A. Ayerbe and M. L. Escalante (Eds.), ISBN: 978-84-88734-13-6, Bilbao, June 27-29, 2022

Link

Review of Breaking Trivium Stream Cipher Implemented in ASIC Using Experimental Attacks and DFA

Autors: F. E. Potestad-Ordoñez, E. Tena-Sánchez, C. Fernández-García, V. Zúñiga-González, J. M. Mora Gutiérrez, C. Baena-Oliva, P. Parra-Fernández, A. J. Acosta-Jiménez, C. J. Jiménez-Fernández

Publication info: Proc. VII Jornadas Nacionales de Investigación en Ciberseguridad (JNIC'2022), 253-256, J. M. de Fuentes, L. González, J. C. Sancho, A. Ayerbe and M. L. Escalante (Eds.), ISBN: 978-84-88734-13-6, Bilbao, June 27-29, 2022

Link

About the FrodoKEM lattice-based algorithm

Autors: M. A. González de la Torre, L. Hernández Encinas and A. Queiruga Dios

Publication info: Proc. VII Jornadas Nacionales de Investigación en Ciberseguridad (JNIC'2022), 253-256, J. M. de Fuentes, L. González, J. C. Sancho, A. Ayerbe and M. L. Escalante (Eds.), ISBN: 978-84-88734-13-6, Bilbao, June 27-29, 2022

Link

Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems

Autors: S. Sánchez-Solano, E. Camacho-Ruiz, M.C. Martínez-Rodríguez and P. Brox

Publication info: Journal Paper · Sensors, vol. 22, no. 5, article 2057, 2022

Link

Hardware Countermeasures Benchmarking against Fault Attacks

Autors: F. E. Potestad-Ordóñez, E. Tena-Sánchez, A. J. Acosta-Jiménez, C. J. Jiménez-Fernández, R. Chaves

Publication info: Appl. Sci. 2022, 12, 2443

Link

Gate-Level Hardware Countermeasure Comparison against Power Analysis Attacks

Autors: E. Tena-Sánchez, E., F. E. Potestad-Ordóñez, C. J. Jiménez-Fernández, A. J. Acosta, R. Chaves

Publication info: Appl. Sci. 2022, 12, 2390

Link

Gate-Level Design Methodology for Side-Channel Resistant Logic Styles Using TFETs

Autors: I. M. Delgado-Lozano, E. Tena-Sánchez, J. Núñez and A. J. Acosta

Publication info: IEEE Embedded Systems Letters (Early Access)

Link

Experimental FIA Methodology Using Clock and Control Signal Modifications under Power Supply and Temperature Variations

Autors: F. E. Potestad-Ordóñez, E. Tena-Sánchez, J.M. Mora-Gutierrez, M. Valencia-Barrero, C. J. Jiménez-Fernández

Publication info: Sensors, vol. 21, no. 22, 7596, 2021

Link

Design Flow to Evaluate the Performance of Ring Oscillator PUFs on FPGAs

Autors: Macarena C. Martínez-Rodríguez, Eros Camacho-Ruiz, Santiago Sánchez-Solano and Piedad Brox

Publication info: XXXVI Conference on Design of Circuits and Integrated Systems (DCIS 2021)

Link

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